The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
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Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 68400 | 53200 | 53200 |
Total Actual Time (secs) | 75182 | 61747 | 55581 |
Delta From Expected (secs) | 6782.00 | 8548.00 | 2381.00 |
% of Expected Total (secs) | 109.92% | 116.07% | 104.48% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 41040.0 | 31920.0 | 31920.0 |
Total Actual Cold Time (secs) | 33786 | 18727 | 28649 |
Delta From Expected (secs) | -7253.44 | -13192.22 | -3270.74 |
% of Exp. Cold Total (secs) | 82.33% | 58.67% | 89.75% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 9 | 75182.00 | 8353.56 |
TE_007AE | 7 | 61748.00 | 8821.14 | |
TE_00B26 | 6 | 46769.00 | 7794.83 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 8812.00 | 8812.00 |
TE_00CA8 | 0 | 0.00 | 0.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 30400 | 15200 | 22800 |
Total Actual Time (secs) | 36596 | 19434 | 27101 |
Delta From Expected (secs) | 6197.00 | 4234.00 | 4301.00 |
% of Expected Total (secs) | 120.38% | 127.86% | 118.86% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 18240.0 | 9120.0 | 13680.0 |
Total Actual Cold Time (secs) | 7466 | 28 | 8525 |
Delta From Expected (secs) | -10773.64 | -9091.30 | -5154.31 |
% of Exp. Cold Total (secs) | 40.93% | 0.31% | 62.32% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 4 | 36597.00 | 9149.25 |
TE_007AE | 2 | 19434.00 | 9717.00 | |
TE_00B26 | 2 | 18289.00 | 9144.50 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 8812.00 | 8812.00 |
TE_00CA8 | 0 | 0.00 | 0.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3625200 | 3579600 | 3564400 |
Total Actual Time (secs) | 3966471 | 3855433 | 3941769 |
Delta From Expected (secs) | 341271.52 | 275833.04 | 377369.65 |
% of Expected Total (secs) | 109.41% | 107.71% | 110.59% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2175120.0 | 2147760.0 | 2138640.0 |
Total Actual Cold Time (secs) | 1971877 | 1908387 | 1865720 |
Delta From Expected (secs) | -203242.83 | -239372.87 | -272919.78 |
% of Exp. Cold Total (secs) | 90.66% | 88.85% | 87.24% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 474 | 3906691.52 | 8241.97 |
TE_007AE | 469 | 3839623.04 | 8186.83 | |
TE_00B26 | 465 | 3801278.93 | 8174.79 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 4 | 32744.00 | 8186.00 |
TE_00CA8 | 2 | 15810.00 | 7905.00 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
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