The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
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Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 30400 | 76000 | 68400 |
Total Actual Time (secs) | 22743 | 63881 | 53990 |
Delta From Expected (secs) | -7656.00 | -12118.00 | -14410.00 |
% of Expected Total (secs) | 74.82% | 84.06% | 78.93% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 18240.0 | 45600.0 | 41040.0 |
Total Actual Cold Time (secs) | 0 | 20396 | 10325 |
Delta From Expected (secs) | -18240.00 | -25203.52 | -30714.41 |
% of Exp. Cold Total (secs) | 0.00% | 44.73% | 25.16% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 4 | 22744.00 | 5686.00 |
TE_007AE | 8 | 49334.00 | 6166.75 | |
TE_00B26 | 8 | 49273.00 | 6159.12 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 4717.00 | 4717.00 |
TE_00CA8 | 2 | 14548.00 | 7274.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 30400 | 76000 | 76000 |
Total Actual Time (secs) | 22743 | 63881 | 59273 |
Delta From Expected (secs) | -7656.00 | -12118.00 | -16727.00 |
% of Expected Total (secs) | 74.82% | 84.06% | 77.99% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 18240.0 | 45600.0 | 45600.0 |
Total Actual Cold Time (secs) | 0 | 20396 | 15403 |
Delta From Expected (secs) | -18240.00 | -25203.52 | -30196.56 |
% of Exp. Cold Total (secs) | 0.00% | 44.73% | 33.78% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 4 | 22744.00 | 5686.00 |
TE_007AE | 8 | 49334.00 | 6166.75 | |
TE_00B26 | 9 | 54556.00 | 6061.78 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 4717.00 | 4717.00 |
TE_00CA8 | 2 | 14548.00 | 7274.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3784800 | 3807600 | 3822800 |
Total Actual Time (secs) | 4130838 | 4081158 | 4198611 |
Delta From Expected (secs) | 346038.52 | 273558.04 | 375811.65 |
% of Expected Total (secs) | 109.14% | 107.18% | 109.83% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2270880.0 | 2284560.0 | 2293680.0 |
Total Actual Cold Time (secs) | 2012159 | 1980623 | 1928781 |
Delta From Expected (secs) | -258720.84 | -303936.76 | -364898.95 |
% of Exp. Cold Total (secs) | 88.61% | 86.70% | 84.09% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 490 | 4026755.52 | 8217.87 |
TE_007AE | 492 | 4008364.04 | 8147.08 | |
TE_00B26 | 494 | 4022238.93 | 8142.18 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 14 | 112929.00 | 8066.36 |
TE_00CA8 | 9 | 72794.00 | 8088.22 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
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