The present targets for the Total and Cold times are:
Total time per SI Mode per measurement: 7600.0 seconds
Fraction of total time the measurement should be cold: 60.0%
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Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 30400 | 68400 | 76000 |
Total Actual Time (secs) | 27744 | 60010 | 64662 |
Delta From Expected (secs) | -2656.00 | -8390.00 | -11338.00 |
% of Expected Total (secs) | 91.26% | 87.73% | 85.08% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 18240.0 | 41040.0 | 45600.0 |
Total Actual Cold Time (secs) | 0 | 17967 | 22702 |
Delta From Expected (secs) | -18240.00 | -23072.26 | -22897.27 |
% of Exp. Cold Total (secs) | 0.00% | 43.78% | 49.79% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 4 | 27744.00 | 6936.00 |
TE_007AE | 8 | 50293.00 | 6286.62 | |
TE_00B26 | 9 | 59945.00 | 6660.56 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 4717.00 | 4717.00 |
TE_00CA8 | 1 | 9717.00 | 9717.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
III. Statistics Since the Start of the Current Epoch
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 38000 | 91200 | 91200 |
Total Actual Time (secs) | 32460 | 77836 | 74662 |
Delta From Expected (secs) | -5539.00 | -13363.00 | -16538.00 |
% of Expected Total (secs) | 85.42% | 85.35% | 81.87% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 22800.0 | 54720.0 | 54720.0 |
Total Actual Cold Time (secs) | 0 | 28871 | 27780 |
Delta From Expected (secs) | -22800.00 | -25848.82 | -26939.42 |
% of Exp. Cold Total (secs) | 0.00% | 52.76% | 50.77% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 5 | 32461.00 | 6492.20 |
TE_007AE | 10 | 63289.00 | 6328.90 | |
TE_00B26 | 11 | 69945.00 | 6358.64 | Old 6 Chip SI Modes | TE_00216 | 0 | 0.00 | 0.00 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 1 | 4717.00 | 4717.00 |
TE_00CA8 | 2 | 14548.00 | 7274.00 | 4 Chip SI Modes | TE_00C62 | 0 | 0.00 | 0.00 |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Expected Time (secs) | 3792400 | 3822800 | 3838000 |
Total Actual Time (secs) | 4140555 | 4095113 | 4214000 |
Delta From Expected (secs) | 348155.52 | 272313.04 | 376000.65 |
% of Expected Total (secs) | 109.18% | 107.12% | 109.80% |
Stats | TE_007AC | TE_007AE | TE_00B26 |
---|---|---|---|
Total Exp. Cold Time (secs) | 2275440.0 | 2293680.0 | 2302800.0 |
Total Actual Cold Time (secs) | 2012159 | 1989097 | 1941158 |
Delta From Expected (secs) | -263280.84 | -304582.06 | -361641.82 |
% of Exp. Cold Total (secs) | 88.43% | 86.72% | 84.30% |
SI Mode | Total Number of Obs. | Total Exposure Time (sec) | Average Exposure (sec/obs) | |
---|---|---|---|---|
Primary 6 Chip SI Modes | TE_007AC | 491 | 4036472.52 | 8220.92 |
TE_007AE | 494 | 4022319.04 | 8142.35 | |
TE_00B26 | 496 | 4037627.93 | 8140.38 | Old 6 Chip SI Modes | TE_00216 | 5 | 478338.25 | 95667.65 |
TE_0021C | 0 | 0.00 | 0.00 | |
TE_008EA | 0 | 0.00 | 0.00 | 5 Chip SI Modes | TE_00C60 | 14 | 112929.00 | 8066.36 |
TE_00CA8 | 9 | 72794.00 | 8088.22 | 4 Chip SI Modes | TE_00C62 | 3 | 167526.73 | 55842.24 |
A word about the COLD Time stats:
- The Total Expected Cold Time value in the table below is 60.0% of the Total Expected Time (see Table above).
- Total Actual Cold Time is the sum of all time during each measurement where the temperature was <= -118.7 degrees C
- % of Expected Total is the fraction of the Total Expected Time achieved
SI Mode Mapping between 6,5 and 4 chip modes:
The 6 chip SI Modes consist of three distinct modes. But there are only 2, 5 chip SI Modes and only one 4 chip SI mode. To make tracking feasible, the 4 and 5 chip modes were mapped into the 6 chip modes in the following manner:
6 chip 5 chip 4 chip
TE_007AC -> TE_00C60 TE_00C62
TE_00B26 -> TE_00C60 TE_00C62
TE_007AE -> TE_00CA8
All of the TE_00CA8s get counted as TE_007AE
Half of the TE_00C60s get counted towards TE_007AC and the other half get counted with the TE_00B26s
Half of the TE_00C62s get counted towards TE_007AC and the other half get counted with the TE_00B26s.
So watchout for TE_00B26 over-representation.
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